Proven ARM-Synopsys Reference Methodology Expanded to Support Synopsys' Galaxy Signal Integrity Solution
ARM Adopted Flow Now Enhanced With Comprehensive Signal Integrity
(SI) Capabilities Including Analysis and Prevention
MOUNTAIN VIEW, Calif. & CAMBRIDGE, England--(BUSINESS WIRE)--Sept.
22, 2003--
Synopsys, Inc. (Nasdaq:SNPS), the world leader in semiconductor
design software, and ARM (Nasdaq:ARMHY)(LSE:ARM), the industry's
leading provider of 16/32-bit embedded RISC processor solutions, today
announced that the ARM-Synopsys Reference Methodology, first
introduced in 2001, now supports Galaxy(TM) SI, a comprehensive signal
integrity (SI) solution within the Galaxy Design Platform. The
ARM-Synopsys Reference Methodology has been established as the proven,
complete solution for all ARM(R) synthesizable microprocessor cores
and has been integrated into the standard deliverables for the
ARM1136JF-S(TM) core. Adding signal integrity enhancements to address
crosstalk delay, noise (glitch), IR (voltage) drop and
electro-migration to the ARM-Synopsys Reference Methodology now
provides ARM Partners with a complete SI-aware implementation solution
for all ARM synthesizable processor IP. Extending the ARM-Synopsys
Reference Methodology that ARM has delivered to more than 20 of its
largest Partners enables them to adopt SI enhancements, including
analysis and prevention, within an existing proven flow.
Many ARM Partners plan to implement chips using silicon processes
at 90 nanometers and below, which means consideration of signal
integrity issues early in the design flow has become an important step
in the design process. The SI-aware Reference Methodology supports
crosstalk prevention and optimization during routing in Astro(TM) and
signoff in PrimeTime(R) SI.
"Three years ago, we started working on the ARM-Synopsys Reference
Methodology, this has been continuously refined and augmented. This
Reference Methodology is used as a standard flow inside ARM for
hardening IP. We have had success in multiple hardening projects and
we are currently working on timing closure at 90 nanometers," said
Simon Segars, executive vice president of Engineering, ARM. "Complete,
integrated reference flows have already been delivered to our
ARM1136JF-S core Partners, the new signal integrity capability,
enables our Partners to resolve noise and cross-talk issues through
the use of Synopsys' PrimeTime SI and Astro-Xtalk(TM)."
The proven ARM-Synopsys Reference Methodology forms the foundation
methodology for ARM's preferred core hardening and modeling solution.
It significantly streamlines the process used by ARM Partners to port
synthesizable ARM microprocessor cores to their chosen technologies,
by potentially reducing the time required to harden and model the core
from months to weeks.
"The ARM-Synopsys Reference Methodology 4.1 has allowed Agere
Systems' Design Center in Ascot, UK to successfully develop several
ARM core implementations. This methodology has indeed provided us with
adaptable, well documented and easy to modify scripts that cover the
entire range of implementation activities," commented Dave Whittlesea,
senior ASIC design engineer, Agere Systems. "Agere plans to use the
enhanced ARM-Synopsys Reference Methodology in our future projects to
take full advantage of our advanced process technology."
"The ARM-Synopsys Reference Methodology provides comprehensive
support for cross-talk, noise, IR drop and electromigration," said
Rich Goldman, vice president of Strategic Market Development at
Synopsys, Inc. "This SI-aware methodology extends the collaborative
flow that ARM and Synopsys have developed over the past three years
and delivered since 2001."
Since the creation of the ARM-Synopsys Reference Methodology,
Synopsys has provided core hardening and integration services to
licensees of ARM synthesizable IP -- including successful core
hardening projects undertaken directly for ARM. By fully leveraging
the Reference Methodology and expanded Galaxy SI solution in
production design flows, Synopsys Professional Services' ARM
technology-certified design centers create ARM core-based design
implementations that are optimized to customer requirements for speed,
power, and silicon area.
Availability
ARM has adopted and standardized on the ARM-Synopsys Reference
Methodology in its deliverables for all synthesizable processor IP.
The ARM-Synopsys Reference Methodology supports ARM's entire
synthesizable processor portfolio including the ARM7TDMI-S(TM) core,
the ARM7EJ-S(TM) core, the ARM926EJ-S(TM) core, the ARM946E-S(TM)
core, the ARM966E-S(TM) core, the ARM1026EJ-S(TM) core and the
ARM1136JF-S core. Version 5 of the ARM-Synopsys Reference Methodology
is expected to be available beginning November 1, 2003, at no charge
to ARM Partners. Synopsys Professional Services offers core hardening
and integration services to ARM Partners, supplementing the service
capabilities offered by ARM.
About ARM
ARM is the industry's leading provider of 16/32-bit embedded RISC
microprocessor solutions. The company licenses its high-performance,
low-cost, power-efficient RISC processors, peripherals, and
system-chip designs to leading international electronics companies.
ARM also provides comprehensive support required in developing a
complete system. ARM's microprocessor cores are rapidly becoming a
volume RISC standard in markets such as portable communications,
hand-held computing, multimedia digital consumer and embedded
solutions.
About Synopsys
Synopsys, Inc. (Nasdaq:SNPS) is the world leader in electronic
design automation (EDA) software for semiconductor design. The Company
delivers technology-leading semiconductor design and verification
platforms to the global electronics market, enabling the development
of complex systems-on-chips (SoCs). Synopsys also provides
intellectual property and design services to simplify the design
process and accelerate time-to-market for its customers. Synopsys is
headquartered in Mountain View, Calif., and has more than 60 offices
located throughout North America, Europe, Japan and Asia. Visit
Synopsys online at http://www.synopsys.com.
Forward-Looking Statements
This press release contains forward-looking statements within the
meaning of the safe harbor provisions of Section 21E of the Securities
Exchange Act of 1934, including statements regarding the expected date
of availability of Version 5 of the ARM-Synopsys Reference
Methodology. These statements are based on Synopsys' current
expectations and beliefs. Actual results could differ materially from
the results implied by these statements as a result of unforeseen
difficulties completing integration of the Galaxy SI solution with the
ARM-Synopsys reference methodology and uncertainties attendant to any
new product offering, as well other factors contained in Synopsys'
Quarterly Report on Form 10-Q for the fiscal quarter ended July 31,
2003 filed with the Securities and Exchange Commission.
ARM is a registered trademark of ARM Limited. ARM7TDMI-S,
ARM7EJ-S, ARM926EJ-S, ARM946E-S, ARM966E-S, ARM1026EJ-S and
ARM1136JF-S are trademarks of ARM Limited. All other brands or product
names are the property of their respective holders. "ARM" is used to
represent ARM Holdings plc (LSE:ARM and Nasdaq:ARMHY); its operating
company ARM Limited; and the regional subsidiaries ARM INC.; ARM KK;
ARM Korea Ltd.; ARM Taiwan; ARM France SAS; ARM Consulting (Shanghai)
Co. Ltd.; and ARM Belgium N.V.
Synopsys and PrimeTime are registered trademarks of Synopsys,
Inc., and Astro, Astro-Xtalk and Galaxy are trademarks of Synopsys.
All other trademarks or registered trademarks mentioned in this
release are the intellectual property of their respective owners.
CONTACT: Synopsys, Inc.
Eileen Hunt, 650-584-5374
elhunt@synopsys.com
or
Edelman Public Relations
Pushpita Prasad, 650-429-2723
Pushpita.prasad@edelman.com
or
ARM
Michelle Spencer, +44 1628 427780
michelle.spencer@arm.com